Reducing multibit DAC circuits errors by a simplified dynamic element matching algorithm used in delta-sigma converters

Resolution of a multibit delta-sigma modulator (DSM) is limited by its internal digital-to-analog converter (DAC) nonlinearity that is usually caused by circuit mismatch errors while realizing. Recently, some dynamic element matching (DEM) methods were proposed for reducing mismatch errors. Two main difficulties of different dynamic element matching (DEM) techniques relate to instability and complexity of their algorithms. This paper provides a general method to simplify and to improve stability of high order dynamic element matching algorithms. It is shown that the proposed modifications can reduce necessary hardware for any order of sorting DEM algorithms and improve stability of the high order tree-structured DEM, without scarifying a considerable part of their ideal mismatchshaping function. Simulations are presented for different 6 and 4-order bandpass mismatch-shaping circuit, moved inside the feedback loop of a 6-order bandpass delta-sigma modulator. However, it can also be used in lowpass DSM.